(a) Field of the Invention
The present invention is related to an integrated semiconductor device, and more particularly it pertains to a Static Induction Transistor (SIT) device.
(b) Description of the Prior Art
A junction-gate static induction transistor is a unipolar transistor similar to a junction gate field effect transistor. For example, an n-channel junction-gate field effect transistor comprises an n.sup.+ type semiconductor source region for supplying current-forming electrons, a drain region for retrieving electrons supplied from the source region, an n.sup.- type semiconductor channel region disposed between the source and the drain regions, and a p.sup.+ type semiconductor gate region disposed adjacent to the channel region. The channel region of the static induction transistor has a low impurity concentration and a short length, as compared with those of usual field effect transistors, so that the depletion region extending from the gate-channel junction can pinch off the channel region to form a potential barrier, which barrier may be called an intrinsic gate. The height of the barrier can be controlled by the drain voltage as well as by the gate voltage. Reduction of this barrier height by the drain voltage leads to unsaturating drain I-V characteristics in cooperation with the small source-to-intrinsic gate resistance. The low impurity concentration of the channel region provides remarkable advantages represented by low parasitic capacitance and high operation speed.
When the gate of the static induction transistor is reverse biased, no carrier injection occurs from the gate to the channel, and only the majority carriers move in the channel region.
When the gate of the static induction transistor is forward biased, the gate-channel junction is forwardly biased, and minority carriers can be injected into the channel region from the gate region. Such minority carriers may enhance the turn-on operation to some extent but will lower the speed of the turn-off operation.
The minority carrier storage effect due to the carriers injected from the control electrode becomes a serious problem when the control circuit for the control electrode has some excessive carrier-supplying ability, i.e. when the control circuit still supplies carriers even after the control electrode of the static induction transistor has attained a high forward potential for turning the static induction transistor on. This becomes more pronounced in the case of an IIL type circuit where the inverter or driver transistor is driven by a constant current source transistor.
A Static Induction Transistor Logic device (SITL device), which is a unique modification of the conventional IIL device employing bipolar transistors to serve as the injector and the driver, respectively, has been proposed, for example, in Japanese Patent Application No. 50-146588 (corresponding U.S. Patent Application Ser. No. 748292/1976 by Jun-ichi NISHIZAWA), and Japanese Patent Application No. 51-92467 (corresponding U.S. Patent Application Ser. No. 819343/1977 by Jun-ichi NISHIZAWA et al.) now abandoned. The basic arrangement of such SITL device is shown in an equivalent circuit in FIG. 1. As shown, the SITL device has a bipolar transistor Q.sub.1 serving as the injector and a static induction transistor Q.sub.2 serving as the driver. The collector of the injector transistor Q.sub.1 is coupled to the gate of the driver transistor Q.sub.2, and the base of the injector transistor Q.sub.1 and the source of the driver transistor Q.sub.2 are mutually coupled together. In the usual operation of this SITL device, a constant potential V.sub.EE is applied to the emitter of the injector Q.sub.1, and the source of the driver transistor Q.sub.2 is grounded. This SITl device will operate in a manner similar to that of the conventional IIL device employing bipolar transistors as injector and driver, but is far superior to the conventional IIL device in many respects, as will be described below.
Firstly, the static induction transistor serving as the driver Q.sub.2, basically, is a majority carrier control device and therefore is significantly less subject to the so-called minority carrier storage effect which contributes to limiting the switching speed of the driver transistor in the conventional ILL device. Consequently, the SITL device can provide a much higher speed in switching operation as compared with that of the conventional IIL device.
Secondly, the static induction transistor, basically, is a voltage-controlled device, so that only a small amount of power is required to drive driver transistor and the driver transistor can be easily coupled to the output of the preceding stage circuit. Also, the power loss in the driver transistor itself is small. Accordingly, the SITL device will allow a high-density integration.
Thirdly, the static induction transistor as the driver has a large transconductance and can provide an increased number of fan-outs. As a result, the SITL device can perform any required logical operation with a simple circuit arrangement.
Fourthly, the SITL device has the advantage that it is simple in construction and can be easily formed into a high integration density by a simple manufacturing process, as will be explained below with reference to FIGS. 2 and 3.
An example of the basic structure of an integrated SITL device as mentioned above is illustrated in a top plan view in FIG. 2 and is also known in FIG. 3 in a vertical section taken along the line III--III of FIG. 2. The SITL includes a semiconductor wafer 10 consisting of a heavily doped n.sup.+ type substrate 13 and a lightly doped n.sup.- layer 14. In the semiconductor layer 14 a heavily doped p.sup.+ type region 11, and a heavily doped p.sup.+ type region 12 of a mesh-like shape are provided. In upper portions of the layer 14 (in those portions surrounded by the region 12) there are provided heavily doped n.sup.+ type regions 15 and 16. The regions 11, 12 and a portion of the layer 14 which is sandwiched between the regions 11 and 12 jointly constitute a lateral bipolar transistor serving as an injector transistor Q.sub.1 as shown in FIG. 1. In further detail, the region 11 functions as an emitter; the region 12 functions as a collector; and the sandwiched portion of the layer 14 functions as the base. On the other hand, the layers 12, 13, 14, 15 and 16 form, jointly therewith, a static induction transistor serving as a driver transistor Q.sub.2 as shown in FIG. 1. More particularly, the substrate 13 functions as a source; the region 12 functions as a gate; and the regions 15 and 16 functions as respective drains. The current channels of the static induction transistor are defined to be those portions of the layer 14 which are surrounded by the region 12. There are provided, on the corresponding locations, drain electrodes D.sub.1 and D.sub.2, a gate/collector electrode G/C, an emitter electrode E, and a source/base electroe S/B. A passivation film layer 17, such as a silicon dioxide film, a silicon nitride film layer and so on, is formed on the exposed upper surface of the semiconductor wafer 10.
As will be easily understood from FIGS. 2 and 3, the SITL device can be manufactured by relying on a simple processing technique wherein the impurity diffusion step is conducted only two times, and four masks are required at most, for instance.
With such a simple structure as well as such a simple process, there has been obtained an integrated SITL device whose power.delay product for low current operation is decreased to as low as 0.002 pJ or less. Furthermore, a specimen of such SITL device exhibiting a minimized delay time of 13.8 nanoseconds or less in an operation with a power dissipation of 230 microwatts has been reduced to practice according to the structure of FIGS. 2 and 3. In this specimen, the semiconductor layer 14 has an impurity concentration of about 10.sup.14 atoms/cm.sup.3 and a thickness of about 6 micrometers, the gate region 12 has an impurity concentration of about 10.sup.17 atoms/cm.sup.3 or more and a thickness of about 2 micro-meters, and the gate mask distance is set to be about 6 micro-meters. The above-mentioned delay time of the SITL device is due to several factors, such as a delay for charging up the gate capacitance of the driver transistor, a delay for carrier transit across the source and the drain of the driver transistor, a carrier storage effect due to unnecessary minority carriers injected from the gate into a high resistivity region around the gate other than the current channel of the drive transistor, a carrier storage effect due to excessive minority carriers injected from the gate into the current channel, and like factors. The former three delay factors may be reduced drastically, by minimizing the thickness of the high resistivity layer 14 (see FIG. 3) to thereby bring the gate 12 into a substantial contact with the low resistivity layer 13 and thereby to reduce the effective distance between the source and the drains 15 and 16, and by minimizing the effective area of the gate 12, for instance. The provision of an insulator region at the output boundary of the driver gate may be effective for preventing the occurrence of an unnecessary carrier injection at the boundary. The last factor may also be somewhat reduced by a decrease in the gate area. In this manner, a specimen of the SITL device has been produced having delay time as small as 4 nanoseconds or less.
The afore-mentioned excellent operating characteristics of the SITL device can not be attained by the conventional IIL device, particularly when the conventional IIL device is designed to provide many fan-outs. Some known modified IIL device comprised of only bipolar transistors, such as the known VIL (Vertical Injection Logic) device and SSL (Self-Aligned Super Injection Logic) device, might be seen as being somewhat comparable to the SITL device only in the delay time characteristic (representative minimum delay time is 8 nanoseconds), but their power.delay product is roughly thirty times or more as large as that of the SITL device. Moreover, these known modified IIL devices are extremely complicated in structure and fairly hard to manufacture as compared with the SITL device.
The SITL device has many excellent features as mentioned above, but still may be improved with respect to the minority carrier storage effect developed in the static induction transistor serving as the driver transistor of the SITL device. This minority carrier storage effect is caused by excessive minority carriers injected into the current channel from the gate when the driver transistor is in the conductive state. More particularly, the current which is supplied by the injector transistor, after having charged the gate capacitance of the driver transistor up to a required potential, continues to flow. This charges the gate capacitance up to an excessively high potential, because the injector current is usually kept substantially constant. As a result, the gate junction of the driver transistor is deeply forward-biased, so that an excessively large amount of carriers are injected, thus bringing about the above-described carrier storage effect. Since a static induction transistor, basically, is a majority carrier control device, the degree of the minority carrier storge effect developing at the current channel of the static function transistor serving as the driver is very low as compared with that in a bipolar transistor. However, the carrier storage effect constitutes a great obstruction in attaining a further increase in the operating speed of the SITL device.
Such minority carrier storage effect at the current channel in the driver static induction transistor might be eliminated by replacing the injector bipolar transistor in the SITL device by a static induction transistor, as proposed in Japanese Patent Application No. 52-4633 (corresponding U.S. Patent Application Ser. No. 867298/1978 by Jun-ichi NISHIZAWA), and in Japanese Patent Application NO. 52-15879 in which the inventor is Jun-ichi NISHIZAWA. Suppose that the device to be employed as the injector transistor has an ideal drain-source voltage V.sub.ds versus drain current I.sub.d characteristic such as shown by the solid line in FIG. 4, in which the drain current I.sub.d is maintained at a desirable minimized value, after the gate potential of the driver transistor has exceeded a predetermined potential V.sub.go necessary to render the driver transistor conductive. When an injector transistor has such characteristic as stated just above, the undesirable excessive minority carrier injection in the driver transistor can be suppressed, and thus the carrier storage effect is greatly reduced. In addition, if the injector static induction transistor is able to supply a sufficiently large amount of drain current I.sub.d to quickly charge the gate capacitance of the driver transistor up to said potential V.sub.go, a sufficiently high speed turning-on operation could be performed by the driver transistor. It should be noted, however, that an actual static induction transistor has such a drain-source voltage versus drain current characteristic as shown by the dash-and-dot line in FIG. 4. Namely, as the gate capacitance of the driver transistor is being charged up with the injector drain current and as, thus, the gate potential of the driver transistor (together with the drain potential of the inejctor transistor) is being pulled up, the drain current of the injector transistor will tend to gradually decrease because of its decreasing drain-source voltage. For this reason, practically speaking, it is impossible to accomplish both the elimination of the excessive minority carrier injection and the quick charging-up of the gate capacitance of the driver transistor, at the same time by replacing the injector with a static induction transistor in an SITL device.